Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System [electronic resource] /
By: Ahmed, Jameel [author.].
Contributor(s): Siyal, Mohammed Yakoob [author.] | Najam, Shaheryar [author.] | Najam, Zohaib [author.] | SpringerLink (Online service).
Series: SpringerBriefs in Computational Intelligence: Publisher: Singapore : Springer Singapore : Imprint: Springer, 2017Edition: 1st ed. 2017.Description: IX, 62 p. 40 illus., 22 illus. in color. | Binding - Card Paper |.Content type: text Media type: computer Carrier type: online resourceISBN: 9789811031205.Subject(s): Computer Engineering | Processor Architectures | Circuits and SystemsDDC classification: 006.3 Online resources: Click here to access eBook in Springer Nature platform. (Within Campus only.) In: Springer Nature eBookSummary: This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors. .This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors. .
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